4.1 Processor Fundamentals - A-Level Computer Science

Learning Objectives

By the end of this lesson, you will be able to:

Show understanding of Von Neumann model and stored program concept
Understand the purpose and role of registers, including difference between general purpose and special purpose registers
Explain the purpose and roles of ALU, Control Unit, system clock, and Immediate Access Store (IAS)
Show understanding of how data are transferred between various components using address bus, data bus, and control bus
Understand how factors contribute to performance of computer system (processor type, cores, bus width, clock speed, cache)
Understand how different ports provide connection to peripheral devices (USB, HDMI, VGA)
Describe stages of Fetch-Execute (F-E) cycle and use register transfer notation
Show understanding of purpose of interrupts, their causes, applications, and handling

Key Terms

Von Neumann Architecture

Computer architecture with single memory for both data and programs

Stored Program Concept

Keeping programmed instructions and data in read-write RAM

ALU (Arithmetic Logic Unit)

Performs arithmetic and logic operations while program is running

Control Unit (CU)

Reads and interprets instructions, generates control signals

System Clock

Produces timing signals to synchronize computer operations

IAS (Immediate Access Store)

Primary RAM memory holding data and programs processor needs

Register

Temporary storage location within CPU for fast data access

MAR (Memory Address Register)

Holds memory addresses of data and instructions

MDR (Memory Data Register)

Contains data to be stored or fetched from memory

Program Counter (PC)

Tracks next memory address of instruction to be executed

CIR (Current Instruction Register)

Stores current instruction while being decoded and executed

Address Bus

Carries addresses between CPU and memory (unidirectional)

Data Bus

Carries data between components (bidirectional)

Control Bus

Carries control signals from CU to other components

Fetch-Execute Cycle

Basic operational process of a CPU: fetch, decode, execute

Interrupt

Signal causing processor to temporarily stop and service it

Von Neumann Architecture & Stored Program Concept

Early computers were fed data while machines were running. It was not possible to store programs or data. John Von Neumann introduced the idea of a stored program computer. Previously data and programs were stored in separate memories. Von Neumann realized that data and programs are somewhat of same type and can use the same memory.

Stored Program Concept

A Stored-Program digital computer is one that keeps its programmed instructions, as well as its data, in read-write, random-access memory (RAM).

Main Features of Von Neumann Architecture

1. Single Processor

There is a processor - central processing unit (CPU) that can access memory directly.

2. Unified Memory

Computer memories that could store programs as well as data in the same memory space.

3. Sequential Execution

Stored programs made up of instructions that could be executed in sequential order.

4. Direct Memory Access

Processor able to access the memory directly without intermediate steps.

Real-Life Example: Smartphone Operation

Think of your smartphone running multiple apps:

Unified Memory: Both app instructions (programs) and your photos/data are stored in the same RAM
Sequential Execution: The CPU processes app instructions one after another (though very fast!)
Stored Program: When you close an app, its instructions remain in memory until needed again
Direct Access: The CPU can directly read/write to any part of the memory

CPU Components Visualization

How it works: The CPU is the brain of the computer. The Control Unit (CU) manages the flow of data and instructions, while the Arithmetic Logic Unit (ALU) performs calculations. Registers provide fast temporary storage, and Memory (IAS) holds programs and data.

Activity 1: Von Neumann Architecture Analysis

Consider a modern laptop computer:

Identify three examples of how it uses the stored program concept
Explain why having a single memory for both data and programs is advantageous
Describe one limitation of the Von Neumann architecture for modern computing

Solution:

Examples:
- Operating system loaded from hard drive into RAM when computer starts
- Web browser program stored in same memory as web page data
- Word processor instructions and document data sharing RAM
Advantage: Simplifies computer design, allows programs to modify themselves, and enables more efficient memory use since program and data space can be allocated dynamically.
Limitation: The "Von Neumann bottleneck" - only one instruction or data item can be fetched from memory at a time, limiting performance compared to architectures with separate program and data memories.

Check Your Understanding: Von Neumann Architecture

1. What was the key innovation of John Von Neumann's architecture? [2 marks]

Answer

[1 mark] The stored program concept - keeping both instructions and data in the same memory
[1 mark] Previously, data and programs were stored in separate memories
[Additional] This allowed programs to be treated as data and modified during execution

2. What are the four main features of Von Neumann architecture? [4 marks]

Answer

[1 mark] There is a single processor (CPU)
[1 mark] Processor can access memory directly
[1 mark] Computer memory stores both programs and data
[1 mark] Programs consist of instructions executed in sequential order

3. Why is the stored program concept important for modern computers? [2 marks]

Answer

[1 mark] Allows programs to be loaded into memory from storage devices
[1 mark] Enables multiple programs to run simultaneously by sharing memory
[Additional] Makes computers more flexible - same hardware can run different programs

CPU Components & Registers

Arithmetic Logic Unit (ALU)

The ALU allows required arithmetic or logic operations to be carried out while a program is being run. It is possible for a computer to have more than one ALU – one will perform fixed point operations and other floating-point operations.

ALU Operations

Arithmetic: Addition, subtraction, multiplication, division
Logic: AND, OR, NOT, XOR comparisons
Multiplication and division are carried out by a sequence of addition, subtraction and left/right shifting operations
The Accumulator is a temporary register used when carrying out ALU calculations

Real-Life Example: Calculator App

When you use a calculator app on your phone:

The ALU performs the actual calculations (5 + 3 = 8)
Fixed-point operations for whole numbers
Floating-point for decimal numbers (3.14 × 2.5)
Logic operations for comparisons (is 10 > 5?)

Control Unit (CU)

The Control Unit (CU) reads an instruction from memory (address of location where instruction can be found is stored in program counter). This instruction is then interpreted. During that process, signals are generated along control bus to tell other components in computer what to do.

Control Unit as Traffic Controller

Think of the CU as a traffic police officer at a busy intersection:

Reads instructions: Like reading traffic rules
Generates signals: Like directing traffic with hand signals
Ensures synchronisation: Making sure all components work together without collisions
Manages flow: Controlling when data moves between components

System Clock

Purpose of System Clock

System clock is used to produce Timing signals on control bus to ensure vital synchronisation takes place. Without the clock the computer would simply crash.

Internal Clock: Controls cycles of activity within processor
System Clock: Controls activities outside processor
Clock Speed: Frequency of clock cycle (e.g., 3.5 GHz = 3.5 billion cycles per second)

Real-Life Example: Music Metronome

Think of a metronome keeping time for musicians:

Timing signals: Metronome clicks at regular intervals
Synchronisation: All musicians play together in time
Speed: Faster tempo = more notes per minute
Without it: Music would be chaotic and uncoordinated

Immediate Access Store (IAS)

IAS is another name for primary (RAM) memory. IAS holds all data and programs that processor needs to access. CPU takes data and programs held in backing store and puts them into IAS temporarily.

Why Use IAS?

This is done because read/write operations carried out using IAS are considerably faster than read/write operations to backing store (hard drive/SSD). Consequently, any key data needed by an application will be stored temporarily in IAS to speed up operations.

IAS (RAM):

Very fast access (~100 ns), temporary storage, loses data when power off

Backing Store (HDD/SSD):

Slower access (~10 ms), permanent storage, keeps data when power off

Registers

One of most fundamental components of Von Neumann system is register. Registers can be General Purpose or Special Purpose.

General Purpose

Hold data frequently used by CPU or used by programmer

Special Purpose

Have specific functions within CPU and hold program state

Accumulator (ACC)

General purpose register used by ALU for calculations

Memory Address Register (MAR)

Holds memory addresses of data and instructions

Memory Data Register (MDR)

Contains data to be stored or fetched from memory

Program Counter (PC)

Tracks next instruction address to be executed

Current Instruction Register (CIR)

Stores current instruction being decoded/executed

Index Register (IX)

Base register for modifying operand addresses

Status Register (SR)

Contains information about processor state (flags)

Status Register Flags

Status register contains information about state of processor. Each bit is known as a flag:

Carry Flag (C): Set to 1 if there is a CARRY following an addition operation
Negative Flag (N): Set to 1 if result yields a NEGATIVE value
Overflow Flag (V): Set to 1 if arithmetic operation results in OVERFLOW
Zero Flag (Z): Set to 1 if result of operation is ZERO

Real-Life Example: Kitchen Analogy

Think of cooking in a kitchen:

MAR: Recipe book page number you're looking at
MDR: Actual recipe instructions on that page
PC: Bookmark showing next recipe to prepare
CIR: Current cooking step you're performing
ACC: Mixing bowl holding ingredients being combined

Activity 2: Register Function Analysis

A CPU is executing the instruction: ADD 5 to the value in memory location 100

Which register would hold the address 100 during the fetch phase?
Which register would hold the actual instruction "ADD 5 to memory location 100"?
Which register would temporarily hold the value 5 during the calculation?
If the result of the addition is 0, which flag in the status register would be set?
Which register tracks the address of the next instruction to fetch?

Solution:

Memory Address Register (MAR) - holds the address (100) of the data to be accessed
Current Instruction Register (CIR) - holds the current instruction being decoded and executed
Accumulator (ACC) - general purpose register used for ALU calculations
Zero Flag (Z) in the Status Register - set to 1 when result is zero
Program Counter (PC) - tracks the next instruction address

Check Your Understanding: CPU Components & Registers

1. What is the difference between the ALU and the Control Unit? [3 marks]

Answer

ALU (Arithmetic Logic Unit):

Performs calculations and logic operations
Handles arithmetic (+, -, ×, ÷) and logic (AND, OR, NOT)
Uses accumulator for temporary storage

Control Unit (CU):

Reads and interprets instructions
Generates control signals to other components
Ensures synchronisation of data flow

2. Explain the purpose of the system clock. [2 marks]

Answer

[1 mark] Produces timing signals on the control bus
[1 mark] Ensures synchronisation of all computer operations
[Additional] Without it, components would work at different speeds causing crashes

3. What is the difference between general purpose and special purpose registers? [3 marks]

Answer

General Purpose:

Hold data frequently used by CPU
Can be used by programmer
Example: Accumulator

Special Purpose:

Have specific functions in CPU
Hold program state information
Examples: PC, MAR, MDR, CIR

4. What are the four flags in the status register and when are they set? [4 marks]

Answer

[1 mark] Carry Flag (C): Set to 1 if carry after addition
[1 mark] Negative Flag (N): Set to 1 if result is negative
[1 mark] Overflow Flag (V): Set to 1 if arithmetic overflow occurs
[1 mark] Zero Flag (Z): Set to 1 if result is zero

5. Why is data moved from backing store to IAS? [2 marks]

Answer

[1 mark] Read/write operations using IAS are considerably faster than backing store
[1 mark] Speeds up operations by storing frequently needed data temporarily in fast memory
[Additional] IAS (RAM) has access times of ~100 ns vs HDD access times of ~10 ms

System Buses & Performance Factors

System buses are used in computers as parallel transmission component. Each wire in bus transmits one bit of data. Following are three common buses used in Von Neumann architecture.

Address Bus

Address Bus Characteristics

Carries addresses throughout computer system between CPU and memory
Unidirectional - bits travel in one direction only (CPU to memory)
Prevents addresses being carried back to CPU, which would be undesirable
Width is important - wider bus = more memory locations addressable

Address Bus Width Example

Number of addressable locations = 2^{bus width}

16-bit bus:

2¹⁶ = 65,536 memory locations

32-bit bus:

2³² = 4,294,967,296 memory locations

Data Bus

Data Bus Characteristics

Bidirectional - allows data to be sent in both directions
Carries data between CPU, memory, and input/output devices
Data can be: an address, an instruction, or a numerical value
Width is important - wider bus = larger word length transported

Real-Life Example: Highway System

Think of buses as highways:

Address Bus: One-way street directing traffic to specific houses
Data Bus: Two-way highway carrying goods between locations
Wider Bus: More lanes = more traffic can flow simultaneously
Control Bus: Traffic lights controlling flow at intersections

Control Bus

Control Bus Function

Control bus is bidirectional. It carries signals from the CU to all other computer components. It is usually 8-bits wide since it only carries control signals such as:

Memory Read

Signal to read from memory

Memory Write

Signal to write to memory

Interrupt Request

Signal that interrupt occurred

Factors Contributing To System Performance

1. Bus Width

Width of address bus and data bus affects performance
Wider address bus = more memory locations addressable
Wider data bus = larger word length transported per cycle
Example: 64-bit bus transfers twice as much data as 32-bit bus per cycle

2. Clock Speed

Clock cycle synchronises all computer operations
Each instruction executed on a clock pulse
One F-E cycle per clock pulse
Faster clock speed = more instructions per second
Warning: Overclocking can cause unsynchronised operations and crashes

3. Cache Memory

Cache memory can improve processor performance
Cache uses SRAM (faster but more expensive)
Main memory uses DRAM (slower but cheaper)
SRAM doesn't need refreshing = faster access times
Cache stores frequently used instructions and data
Processor checks cache first, then main memory

4. Number of Cores

One core = ALU + CU + registers
Each core processes one instruction per clock pulse
More cores = instructions split between them
More than one instruction executed per clock pulse
More sequences of instructions run simultaneously
Note: Doubling cores doesn't double performance due to communication overhead

Real-Life Example: Gaming PC Performance

A gamer builds a PC for better gaming performance:

Clock Speed (4.0 GHz): Higher speed means game physics calculated faster
Multiple Cores (8-core): Game, streaming software, and Discord can run simultaneously
Wide Data Bus (64-bit): Transfers more game texture data per cycle
Large Cache (16MB): Frequently used game assets load faster from cache
RAM Speed (3200 MHz): Faster transfer between RAM and CPU

Activity 3: Performance Factor Calculations

Calculate the following:

How many memory locations can a 24-bit address bus address?
If a CPU has a clock speed of 3.2 GHz, how many clock cycles occur in 5 milliseconds?
A computer has a 32-bit data bus. How many 8-bit values can it transfer in one clock cycle?
If a dual-core processor runs at 2.5 GHz, what's the maximum theoretical number of instructions it could execute per second?
Compare cache access time (10 ns) to hard disk access time (10 ms). How many times faster is cache?

Solution:

24-bit address bus: 2²⁴ = 16,777,216 memory locations
3.2 GHz in 5 ms: 3.2 × 10⁹ cycles/sec × 0.005 sec = 16,000,000 cycles
32-bit bus transferring 8-bit values: 32 ÷ 8 = 4 values per cycle
Dual-core at 2.5 GHz: 2 cores × 2.5 × 10⁹ = 5 × 10⁹ instructions/sec maximum
Cache vs HDD speed: 10 ms ÷ 10 ns = 1,000,000 times faster (cache is a million times faster!)

Check Your Understanding: System Buses & Performance

1. Compare the three types of system buses. [6 marks]

Answer

Address Bus	Data Bus	Control Bus
Carries memory addresses	Carries data/instructions	Carries control signals
Unidirectional (CPU → Memory)	Bidirectional	Bidirectional
Width determines addressable memory	Width determines data transfer size	Usually 8-bits wide
Example: Carries address 100 to read from	Example: Carries value 42 from memory	Example: Carries "memory read" signal

2. How does cache memory improve processor performance? [3 marks]

Answer

[1 mark] Cache uses SRAM which has faster access times than DRAM (no need for refreshing)
[1 mark] Stores frequently used instructions and data that need to be accessed faster
[1 mark] Processor checks cache first before accessing slower main memory
[Additional] This reduces average memory access time and speeds up program execution

3. Why doesn't doubling the number of cores double computer performance? [2 marks]

Answer

[1 mark] CPU needs to communicate with each core, creating overhead
[1 mark] Not all tasks can be parallelized effectively across multiple cores
[Additional] Some programs are not designed to use multiple cores efficiently

4. What happens if clock speed is increased beyond design specifications? [2 marks]

Answer

[1 mark] Can lead to unsynchronised operations as components can't keep up
[1 mark] Computer would crash leading to unreliable performance
[Additional] Known as "overclocking" - can also cause overheating and hardware damage

5. Calculate how many memory locations a 20-bit address bus can address. [2 marks]

Answer

[1 mark] Formula: Number of locations = 2^{bus width}
[1 mark] 2²⁰ = 1,048,576 memory locations
[Additional] This is exactly 1 megabyte of addressable memory (if each location holds 1 byte)

Computer Ports

Input and output devices are connected to a computer via ports. Interaction of ports with connected input and output is controlled by control unit.

USB Ports

Universal Serial Bus (USB) is an asynchronous serial data transmission method. Standard for transferring data between computer and devices.

Cable: 4-wired shielded cable (2 power, 2 data)

HDMI Ports

High-definition multimedia interface (HDMI) ports allow output (both audio and visual) from computer to HDMI-enabled device. Supports high-definition signals.

Replacement: Digital replacement for older VGA analogue

VGA Ports

Video Graphics Array (VGA) was introduced in 1980s. Does not transmit audio component. Supports 640 × 480 pixel resolution.

Refresh Rate: Up to 60 Hz (60 frames a second)

USB Port Details

When Device is Plugged In

Computer automatically detects device (voltage change on data wires)
Device is automatically recognised
Appropriate device driver is loaded
If new device, computer looks for matching driver
If driver not available, user prompted to download software

Pros & Cons of USB

Pros:

Automatic detection
Device drivers auto-loaded
Connectors fit one way only
Industry standard
Multiple data rates
Backward compatible

Cons:

Limited transmission rate (<500 Mbps)
Max cable length ~5 metres
Older standards may not be supported

HDMI Port Details

Modern HD Television Features

Widescreen format (16:9 aspect ratio)
Greater number of pixels (typically 1920 × 1080)
Faster refresh rate (120 Hz = 120 frames per second)
Extremely large colour range (~4 million variations)

HDMI increases bandwidth to supply necessary data for high quality sound and visual effects.

HDMI Security Feature

HDMI provides protection against piracy using high-bandwidth digital copy protection (HDCP).

Example: Blu-ray player checks authentication key of HD television. If authenticated, handshaking occurs and data transmission begins.

HDMI Pros & Cons

Pros of HDMI	Cons of HDMI
Current standard for modern TVs/monitors	Not very robust connection (easy to break)
Very fast data transfer rate	Limited cable length for good signal
Improved security (prevents piracy)	Five different cable/connection standards
Supports modern digital systems

VGA Pros & Cons

Pros of VGA	Cons of VGA
Simpler technology	Old out-dated analogue technology
Only one standard available	Easy to bend pins when connecting
Easy to split signal to multiple devices	Requires high-grade cables for good signal
Connection is secure

Activity 4: Port Selection Scenario

A school is setting up a new computer lab. They need to connect various devices:

High-definition monitors for video editing workstations
Older projectors in some classrooms (from 2005)
Multiple peripherals (keyboards, mice, printers) for each computer
External hard drives for data backup
Digital cameras for photography class

Task: For each device, recommend the most appropriate port type (USB, HDMI, or VGA) and justify your choice.

Solution:

HD monitors for video editing: HDMI - supports high-definition video and audio needed for video editing, fast data transfer for high-resolution video
Older projectors (2005): VGA - older projectors typically have VGA connections, analogue signal compatible with older hardware
Peripherals (keyboards, mice, printers): USB - universal standard, automatic detection, supports multiple devices through hubs
External hard drives: USB - fast data transfer, universal compatibility, supports large storage devices
Digital cameras: USB - most cameras use USB for data transfer, allows charging and data transfer simultaneously

Check Your Understanding: Computer Ports

1. What happens when a USB device is plugged into a computer? [4 marks]

Answer

[1 mark] Computer automatically detects device (voltage change on data wires)
[1 mark] Device is automatically recognised
[1 mark] Appropriate device driver is loaded
[1 mark] If new device, computer looks for matching driver or prompts user

2. Why was HDMI developed to replace VGA? [3 marks]

Answer

[1 mark] Modern HD televisions require more data at faster rates
[1 mark] HDMI supports both audio and visual (VGA only supports visual)
[1 mark] HDMI is digital (better quality) vs VGA analogue
[Additional] HDMI supports higher resolutions, faster refresh rates, and anti-piracy protection

3. What are the main advantages of USB over older connection methods? [3 marks]

Answer

[1 mark] Automatic detection and driver loading (plug and play)
[1 mark] Universal industry standard with wide support
[1 mark] Connectors fit only one way, preventing incorrect connections
[Additional] Backward compatibility, multiple data rates, supports many device types

4. How does HDMI provide protection against piracy? [2 marks]

Answer

[1 mark] Uses High-bandwidth Digital Copy Protection (HDCP)
[1 mark] Authentication protocol checks device keys before transmitting data
[Additional] Example: Blu-ray player authenticates TV before playing copyrighted content

5. What are the limitations of VGA technology? [3 marks]

Answer

[1 mark] Old out-dated analogue technology
[1 mark] Easy to bend pins when making connections
[1 mark] Requires high-grade cables for good undistorted signal
[Additional] Doesn't transmit audio, limited to 640×480 resolution

Fetch-Execute Cycle & Interrupts

Fetch-Execute Cycle Steps

1. Load address from PC into MAR

Load address that is in program counter (PC) into memory address register (MAR)

MAR ← [PC]

2. Increment PC by 1

Increment PC by 1 to point to next instruction

PC ← [PC] + 1

3. Load instruction into MDR

Load instruction that is in memory address given by MAR into MDR

MDR ← [[MAR]]

4. Load instruction into CIR

Load the instruction that is now in MDR into current instruction register (CIR)

CIR ← [MDR]

5. Decode the instruction

Decode the instruction that is in the CIR

6. If jump instruction

If instruction is a jump instruction then load address part into PC and reset

7. Execute the instruction

Execute the instruction (perform the operation)

8. Reset to step 1

Reset by going to step 1 to fetch next instruction

Cycle Phase Summary

FETCH

Steps 1-4: Get instruction from memory

DECODE

Step 5: Understand what to do

EXECUTE

Steps 6-7: Perform the operation

Register Transfer Notation (RTN)

RTN Notation	Meaning
MAR ← [PC]	Contents of PC copied into MAR
PC ← [PC] + 1	PC is incremented by 1
MDR ← [[MAR]]	Data stored at address shown in MAR is copied into MDR
CIR ← [MDR]	Contents of MDR copied into CIR

Note: Double brackets [[MAR]] mean "data stored at the address shown in MAR" not the MAR contents themselves.

Interrupts

What is an Interrupt?

An interrupt is a signal sent from a device or from software to the processor. This will cause processor to temporarily stop what it is doing and service the interrupt.

Real-Life Example: Like a phone ringing while you're studying. You pause your work, answer the call, then return to studying.

Causes of Interrupts

Timing Signal (timer/clock interrupt)
Input/Output Processes (disk drive ready for more data)
Hardware Fault (printer paper jam, overheating)
User Interaction (keyboard press, mouse click)
Software Error (divide by zero, file not found)

Interrupt Handling Process

Key Points: Interrupts are checked at the end of each fetch-execute cycle. If interrupt priority is higher than current process, the processor saves its state, runs the Interrupt Service Routine (ISR), then restores its state and continues.

Real-Life Example: Multitasking with Interrupts

Interrupts allow computers to carry out many tasks or to have several windows open at same time. An example would be downloading a file from internet at same time as listening to music from the computer library.

Music player runs normal program
Download manager sends interrupt when download chunk completes
CPU pauses music, saves music player state
CPU processes download (writes data to disk)
CPU restores music player state and continues music
User perceives both happening simultaneously

Activity 5: Fetch-Execute Cycle Tracing

Trace through the fetch-execute cycle for this scenario:

Current PC value: 100 (address of next instruction)
Memory location 100 contains: "ADD 5 to ACC"
Current ACC value: 10
After executing, the instruction at address 101 should be fetched next

Task: Write the RTN for each step of the fetch phase, and describe what happens during decode and execute phases.

Solution:

Fetch Phase (RTN):

MAR ← [PC] // MAR = 100
PC ← [PC] + 1 // PC = 101
MDR ← [[MAR]] // MDR = "ADD 5 to ACC" from memory location 100
CIR ← [MDR] // CIR = "ADD 5 to ACC"

Decode Phase:

Control Unit decodes "ADD 5 to ACC" - understands it needs to add 5 to the Accumulator.

Execute Phase:

ALU performs addition: ACC ← [ACC] + 5. New ACC value = 15.

Reset:

Process returns to step 1 to fetch next instruction from address 101 (now in PC).

Check Your Understanding: Fetch-Execute Cycle & Interrupts

1. Describe the fetch phase of the fetch-execute cycle. [4 marks]

Answer

[1 mark] Load address from PC into MAR
[1 mark] Increment PC by 1
[1 mark] Load instruction from memory address (in MAR) into MDR
[1 mark] Load instruction from MDR into CIR
[Additional] RTN: MAR←[PC], PC←[PC]+1, MDR←[[MAR]], CIR←[MDR]

2. What is the purpose of the double brackets in RTN? [2 marks]

Answer

[1 mark] Double brackets mean "data stored at the address shown in" the register
[1 mark] MDR ← [[MAR]] means copy data from memory address in MAR to MDR (not copy MAR itself)
[Additional] Differentiates between register contents vs memory contents at that address

3. What are interrupts and why are they important? [3 marks]

Answer

[1 mark] Signals that cause processor to temporarily stop and service them
[1 mark] Allow computers to respond to external events in real-time
[1 mark] Enable multitasking - multiple tasks can run apparently simultaneously
[Additional] Examples: user input, hardware events, timer signals, errors

4. When are interrupts checked during the fetch-execute cycle? [1 mark]

Answer

[1 mark] At the end of each fetch-execute cycle
[Additional] This ensures the processor completes current instruction before handling interrupt

5. What happens if an interrupt has lower priority than current process? [2 marks]

Answer

[1 mark] Current process continues execution
[1 mark] Interrupt is queued or ignored until current process completes or higher priority task finishes
[Additional] Lower priority interrupts are disabled while higher priority process runs

6. Give three examples of interrupt causes. [3 marks]

Answer

[1 mark] Timing signal (clock/timer interrupt)
[1 mark] Hardware fault (printer paper jam, overheating)
[1 mark] User interaction (keyboard press, mouse click)
[Additional] I/O process complete, software error (divide by zero)

Key Takeaways

Von Neumann architecture uses stored program concept - both data and instructions in same memory
CPU components include ALU (calculations), Control Unit (manages operations), registers (fast storage), and system clock (synchronisation)
Registers can be general purpose (Accumulator) or special purpose (PC, MAR, MDR, CIR, Status Register)
System buses include address bus (unidirectional, carries addresses), data bus (bidirectional, carries data), and control bus (carries control signals)
Computer performance factors: bus width, clock speed, cache memory, number of cores
Computer ports: USB (universal serial bus, plug-and-play), HDMI (high-definition digital audio/video), VGA (older analogue video only)
Fetch-Execute cycle: Fetch (get instruction), Decode (understand it), Execute (perform operation) - repeats continuously
Register Transfer Notation (RTN) uses brackets to show data movement: MAR←[PC], MDR←[[MAR]]
Interrupts are signals that pause current process to handle urgent events - checked at end of each F-E cycle
Interrupt Service Routine (ISR) handles interrupts - processor saves state, runs ISR, restores state, continues
Immediate Access Store (IAS) is RAM - faster than backing store, holds active programs/data
Clock speed measured in Hz - higher speed = more instructions per second, but overclocking can cause crashes

Question Bank

1. Explain the stored program concept and its significance in Von Neumann architecture. [4 marks]

Marking Scheme & Answer

[1 mark] Stored program concept keeps both instructions and data in read-write RAM
[1 mark] Previously, data and programs were stored in separate memories
[1 mark] Von Neumann realized data and programs are similar and can use same memory
[1 mark] Significance: Allows programs to be treated as data, modified during execution, and loaded from storage
[Additional] Enables modern computing with multiple programs in memory, program modification, and flexibility

2. Describe the functions of the ALU and Control Unit in a processor. [4 marks]

Marking Scheme & Answer

Arithmetic Logic Unit (ALU):

Performs arithmetic operations (+, -, ×, ÷)
Performs logic operations (AND, OR, NOT)
Uses accumulator for temporary storage
May have separate units for fixed/floating point

Control Unit (CU):

Reads and interprets instructions
Generates control signals on control bus
Ensures synchronisation of data flow
Manages fetch-execute cycle

3. Compare and contrast general purpose and special purpose registers. [5 marks]

Marking Scheme & Answer

General Purpose Registers:

Hold data frequently used by CPU
Can be used by programmer directly
Example: Accumulator (ACC)
Used for temporary storage during calculations
Multiple general purpose registers available

Special Purpose Registers:

Have specific functions within CPU
Hold program state information
Examples: PC, MAR, MDR, CIR, Status Register
Not typically accessed directly by programmers
Essential for fetch-execute cycle operation

Key Difference: General purpose registers are for data storage/manipulation, while special purpose registers control CPU operation and track program state.

4. Explain how the three system buses facilitate data transfer in a computer. [6 marks]

Marking Scheme & Answer

Address Bus	Data Bus	Control Bus
Carries memory addresses from CPU to memory	Carries data/instructions between components	Carries control signals from CU
Unidirectional (CPU → memory only)	Bidirectional (data flows both ways)	Bidirectional
Width determines addressable memory (2^width locations)	Width determines data transfer size per cycle	Usually 8-bits wide (carries signals only)
Example: CPU sends address 100 to read from	Example: Memory sends data value 42 to CPU	Example: CU sends "memory read" signal
Prevents addresses returning to CPU	Can carry addresses, instructions, or data	Includes timing signals from system clock

5. Describe four factors that affect computer system performance. [8 marks]

Marking Scheme & Answer

1. Bus Width:

Wider address bus = more memory addressable
Wider data bus = more data transferred per cycle
Example: 64-bit bus transfers twice as much as 32-bit

2. Clock Speed:

Higher speed = more instructions per second
One F-E cycle per clock pulse
Typical: 3.5 GHz = 3.5 billion cycles/second
Overclocking can cause crashes

3. Cache Memory:

Uses faster SRAM (no refreshing needed)
Stores frequently used instructions/data
Processor checks cache before main memory
Reduces average memory access time

4. Number of Cores:

Each core = ALU + CU + registers
More cores = parallel processing
Multiple instructions per clock pulse
Doesn't double performance due to overhead

6. Compare USB, HDMI, and VGA ports. [6 marks]

Marking Scheme & Answer

USB	HDMI	VGA
Universal Serial Bus	High-Definition Multimedia Interface	Video Graphics Array
Data transfer between computer and devices	Audio and visual output to displays	Video output only (no audio)
Asynchronous serial transmission	Digital signal	Analogue signal
Plug-and-play, automatic detection	Modern standard for HD displays	Older technology (1980s)
Supports multiple data rates	Supports high resolutions (1920×1080+)	Limited to 640×480 resolution
Backward compatible	HDCP anti-piracy protection	Easy to bend pins
Max cable length ~5 metres	Limited cable length for good signal	Requires high-grade cables

7. Describe the fetch-execute cycle using register transfer notation. [6 marks]

Marking Scheme & Answer

Fetch Phase:

MAR ← [PC]
PC ← [PC] + 1
MDR ← [[MAR]]
CIR ← [MDR]

Decode Phase:

Control Unit decodes instruction in CIR

Execute Phase:

If jump instruction: PC ← address part
Otherwise: Execute the operation

Cycle then repeats: Reset to step 1 to fetch next instruction

Note: Double brackets [[MAR]] mean "data stored at address in MAR"

8. Explain how interrupts are handled by a processor. [8 marks]

Marking Scheme & Answer

[1 mark] At end of each fetch-execute cycle, processor checks for interrupts
[1 mark] Checks interrupt flag/register for any set bits
[1 mark] Identifies source and checks priority of interrupt
[1 mark] If priority lower than current process, current process continues
[1 mark] If priority high enough, lower priority interrupts disabled
[1 mark] Contents of registers saved to stack (Process Control Block)
[1 mark] Processor calls Interrupt Service Routine (ISR) - address loaded into PC
[1 mark] ISR code runs, then registers restored from stack, interrupts re-enabled, F-E cycle continues

9. What is the purpose of the system clock and how does it affect performance? [4 marks]

Marking Scheme & Answer

[1 mark] System clock produces timing signals on control bus
[1 mark] Ensures synchronisation of all computer operations
[1 mark] Each instruction executed on a clock pulse (one F-E cycle per pulse)
[1 mark] Higher clock speed = more instructions per second = better performance
[Additional] Typical speed: 3.5 GHz (3.5 billion cycles/sec). Overclocking can cause unsynchronised operations and crashes.

10. Explain the role of the Status Register and its four main flags. [5 marks]

Marking Scheme & Answer

The Status Register contains information about the state of the processor. Each bit is known as a flag:

[1 mark] Carry Flag (C): Set to 1 if there is a CARRY following an addition operation
[1 mark] Negative Flag (N): Set to 1 if the result of a calculation yields a NEGATIVE value
[1 mark] Overflow Flag (V): Set to 1 if an arithmetic operation results in an OVERFLOW
[1 mark] Zero Flag (Z): Set to 1 if the result of an arithmetic or logic operation is ZERO
[1 mark] Used when instructions require arithmetic/logic processing to indicate results/errors